Conventionally, in the n channel MOS transistor and the p channel MOS transistor which constitute a CMOS circuit, a silicon oxide film is used as a gate insulator material, and a polycrystalline silicon film or a laminated film (polycide film) obtained by laminating a metal silicide film such as a W (tungsten) silicide film or a Co (cobalt) silicide film on a polycrystalline silicon film is used as a gate electrode material formed on the gate oxide film.
Then, an n type impurity (phosphorus, arsenic or the like) is introduced into the polycrystalline silicon film constituting the gate electrode of the n channel MIS transistor to set the work function (Fermi level) of the gate electrode close to the conduction band of Si (approximately 4.05 eV). By doing so, the threshold voltage is reduced. Meanwhile, a p type impurity (boron or the like) is introduced into the polycrystalline silicon film constituting the gate electrode of the p channel MIS transistor to set the work function of the gate electrode close to the valence band of Si (approximately 5.17 eV). By doing so, the threshold voltage is reduced.
However, along with the miniaturization of the MIS transistors constituting the semiconductor integrated circuit, the thickness of the gate oxide film has been rapidly reduced in recent years. Consequently, when voltage is applied to the gate electrode to turn on the MIS transistor, the influence of the depletion in the gate electrode (polycrystalline silicon film) adjacent to the gate oxide film interface becomes increasingly significant, and the thickness of the gate oxide film is apparently increased. As a result, it becomes difficult to ensure the ON current and the operation speed of the transistor is significantly reduced.
Also, when the thickness of the gate oxide film is reduced, since the electrons pass through the gate oxide film due to the quantum effect called direct tunneling, the leakage current is increased. Furthermore, in the p channel MIS transistor, boron in the gate electrode (polycrystalline silicon film) diffuses in the substrate through the gate oxide film, and the impurity concentration of the channel region is increased. Therefore, the threshold voltage fluctuates.
For its solution, the replacement of the gate insulator material from the silicon oxide to the insulator with a higher dielectric constant (high dielectric constant film) and the replacement of the gate electrode material from the polycrystalline silicon (or polycide) to the metal silicide or metal have been examined (for example, Japanese Patent Laid-Open Publication No. 2004-158593, Japanese Patent Laid-Open Publication No. 2004-152995, US Patent Application Publication No. 2004/0065930A1, U.S. Pat. No. 6,475,908 B1 and U.S. Pat. No. 6,750,519 B2).
This is because, when the high dielectric constant film is used to constitute the gate insulator, the actual physical thickness can be increased by a factor of “dielectric constant of a high dielectric constant film/dielectric constant of a silicon oxide film” without changing the capacitance of the equivalent silicon oxide thickness (EOT), and as a result, the leakage current can be reduced. As a high dielectric constant material, various metal oxides such as Hf (hafnium) oxide and Zr (zirconium) oxide have been examined.
In addition, when a material not containing polycrystalline silicon is used to constitute the gate electrode, the reduction of the ON current due to the depletion and the boron leakage from the gate electrode to the substrate can be prevented.
Japanese Patent Laid-Open Publication No. 2004-158593, Japanese Patent Laid-Open Publication No. 2004-152995, and US Patent Publication No. 2004/0065930 A1 disclose the method of forming a p channel MIS transistor and an n channel MIS transistor. In this method, when forming an n channel MIS transistor and a p channel MIS transistor, after forming a silicon-based gate insulator and further a high dielectric constant film as the gate insulator, a metal film such as Pt (platinum), Ti (titanium), Ni (nickel), Co, Ta (tantalum) or Zr is deposited, and silicon is ion-implanted into one metal film to form metal silicide with using the other metal film as a mask, and then, an electrode of the metal film and an electrode of the metal silicide film are respectively formed. In this case, a material with a high work function is used for the p channel MIS transistor, and a material with a low work function is used for the n channel MIS transistor.
Also, US Patent Publication No. 2004/0065930 A1, U.S. Pat. No. 6,475,908 B1 and U.S. Pat. No. 6,750,519 B2 disclose the list of the work function of metals. Note that, it is estimated that the work function shown in the list is measured directly from the metal films.
The work function of a gate electrode formed on a silicon-based gate insulator such as a silicon oxide film and a silicon oxynitride film is reflected relatively directly in the electrical characteristics. However, when a high dielectric constant material represented by Hf-based oxide is used for the gate insulator, the effective work function is varied in comparison to the case where the silicon-based gate insulator is used, and it is interpreted as the Fermi level pinning (IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 6, JUNE 2004, PP. 971 TO 984).